绦
20
摹ī啡
22
摹
11.
software (Register Initiate code)
{ \
{ 0x14, 0x00000000 }, /* Power Save Configuration Register */ \
{ 0x64, 0x28D70000 }, /* GPIO Status and Control Register */ \
{ 0x04, 0x00000000 }, /* Memory Clock Configuration Register */ \
{ 0x08, 0x00000032 }, /* Pixel Clock Configuration Register */ \
{ 0x0C, 0x00000061 }, /* Panel Type and MOD Rate Register */ \
{ 0x10, 0x00000010 }, /* Display Settings Register */ \
{ 0x20, 0x00000030 }, /* Horizontal Total Register */ \
{ 0x24, 0x00000027 }, /* Horizontal Display Period Register */ \
{ 0x28, 0x0000000F },
/* Horizontal Display Period Start Position Register */ \
{ 0x2C, 0x00870156 }, /* FPLINE Register */ \
{ 0x30, 0x00000103 }, /* Vertical Total Register */ \
{ 0x34, 0x000000EF }, /* Vertical Display Period Register */ \
{ 0x38,
0x00000013 }, /* Vertical Display
Period Start Position Register */ \
{ 0x3C, 0x00800000 }, /* FPFRAME Register */ \
{ 0x40,
0x00000000 }, /* Main Window Display Start Address Register */ \
{ 0x44, 0x000000A0 }, /* Main Window Line Address Offset Register */ \
{ 0x50, 0x00000000 }, /*
PIP+ Window Display Start Address Register */ \
{ 0x54, 0x000000A0 }, /* PIP+ Window Line Address Offset Register */ \
{ 0x58, 0x00000000 }, /* PIP+ Window X Positions Register */ \
{ 0x5C, 0x00000000 }, /* PIP+ Wi
ndow Y Positions Register */ \
{ 0x60, 0x00000000 }, /* Special Purpose Register */ \
{ 0x70, 0x00000000 }, /* PWM Clock Configuration Register */ \
{ 0x74, 0x00000000 }, /* PWMOUT Duty Cycle Register */ \
{ 0x80, 0x00000000 }, /* Scratch Pad A Register */ \
{ 0x84, 0x00000000 }, /* Scratch Pad B Register */ \
{ 0x88, 0x00000000 }, /* Scratch Pad C Register */ \
{ S1D_REGDELAYON, 0x00000032 }, /* LCD Panel Power
On Delay (in ms) */ \
{ 0x64, 0x28D70001 }, /* GPIO Status and Control Register */ \
{ 0x14, 0x00000000 } /* Power Save Configuration Register */ \
}